Workshop Proceedings are Published by the IEEE Computer Society Press

2010 International Workshop on
Multi-Core Computing Systems
(MuCoCoS 2010)

Krakow, Poland, February 15, 2010, in conjunction with CISIS 2010

:: MuCoCoS 2011
:: Program (PDF, TXT)
:: Call for Book Chapters (TXT)
:: Call for Papers (PDF, TXT)
:: Submission Guidelines
:: Important Dates
:: Workshop Co-chairs
:: Program Committee
:: Keynote Address
:: Contact Person
:: Registration
:: Venue

Andrzej Frycz Modrzewski Krakow University

:: Media Sponsor

:: Previous Workshops
>> MuCoCoS 2009
>> MuCoCoS 2008




The improvement of the processor performance by increasing the clock rate has reached its technological limits. Increasing the number of processor cores rather than clock rate can give better performance and reduce problems like energy consumption, heat dissipation and design complexity. As a result we are now witnessing the emergence of multi-core processors in all markets from laptops and game consoles to servers and supercomputers. However, also from the software development perspective exploiting the full potential of multi-core computing systems is a highly complex and essentially open domain, at the moment forcing application developers to deal with numerous low-level details. Major research efforts are required to streamline the process of software development for multi-core computing systems.
Following the successful organization of MuCoCoS 2008 (Barcelona, Spain) and MuCoCoS 2009 (Fukuoka, Japan), MuCoCoS 2010 will be organized in Krakow (Poland). MuCoCoS 2010 is aiming to bring together researchers, developers, practitioners, and users of multi-core computing systems.

Topics of Interest

The topics of the workshop include but are not limited to:
:: homogenous and heterogeneous multi-core architectures
:: accelerated multi-core architectures
:: interconnection networks
:: multi-core embedded systems
:: programming languages and models
:: algorithms for multi-core computing systems
:: applications for multi-core systems
:: performance modeling and evaluation of multi-core systems
:: simulation of multi-core systems
:: design space exploration
:: resource usage optimization
:: tool-support for multi-core systems
:: compilers, runtime and operating systems

Submission Guidelines

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- The papers should be prepared using the IEEE CS format, and no longer than 6 pages. Submitted papers will be carefully evaluated based on originality, significance to workshop topics, technical soundness, and presentation quality.
- Submission of the paper implies that should the paper be accepted, at least one of the authors will register and present the paper at the workshop. Proceedings of the workshop will be published by IEEE Computer Society Press. The best papers presented at the workshop will be selected for publication in a Wiley Book on "Programming Multi-core and Many-core Computing Systems".
- The IEEE final paper preparation and submission instructions are available here.

Important Dates

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- Submission: October 09, 2009
- Notification: November 02, 2009
- Registration: December 11, 2009
- Final version of the paper: December 11, 2009
- Workshop: February 15, 2010

Workshop Co-chairs

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- Sabri Pllana, University of Vienna, Austria 
- Leonard Barolli, Fukuoka Institute of Technology, Japan
- Fatos Xhafa, Polytechnic University of Catalonia, Spain

Program Committee

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- Ajith Abraham, Machine Intelligence Research Labs (MIR Labs), USA
- Pavan Balaji, Argonne National Laboratory, USA
- Jacob Barhen, Oak Ridge National Laboratory/ University of Tennessee, USA
- Siegfried Benkner, University of Vienna, Austria
- François Bodin, CAPS Entreprise, France
- Marian Bubak, AGH Krakow/ Universiteit van Amsterdam, Poland/ Netherlands
- Jinjun Chen, Swinburne University of Technology, Australia
- Alastair Donaldson, University of Oxford, UK
- Martti Forsell, VTT, Finland
- Geoffrey Fox, Indiana University, USA
- Helen Karatza, Aristotle University of Thessaloniki, Greece
- Christoph Kessler, Linköping University, Sweden
- Beniamino Di Martino, Second University of Naples, Italy
- Pierre Michaud, IRISA/INRIA, France
- Wojciech Mikanik, Silesian University of Technology, Poland
- Bernd Mohr, Research Centre Jülich, Germany
- Nysret Musliu, Vienna University of Technology, Austria
- Jarek Nabrzyski, University of Notre Dame, USA
- Raymond Namyst, INRIA Bordeaux Sud-Ouest, France
- Lasse Natvig, Norwegian University of Science and Technology, Norway
- Victor Pankratius, Universität Karlsruhe, Germany
- Bertil Schmidt, Nanyang Technological University, Singapore
- Leonel Sousa, Technical University of Lisbon, Portugal
- Jie Tao, Karlsruhe Institute of Technology, Germany
- Jesper Larsson Träff, NEC Laboratories Europe, NEC Europe Ltd, Germany
- Gabriel A. Wainer, Carleton University, Canada
- Roland Wismüller, University of Siegen, Germany
Keynote Address

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MPSoC Design Technologies for Wireless Multimedia Terminals.
Rainer Leupers, RWTH Aachen University, Germany
Contact Person

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Sabri Pllana
University of Vienna, Austria
T +43 1 4277 39411
F +43 1 4277 9394
E pllana [at]


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The workshop registration will be performed via CISIS 2010 website.


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The workshop will be organized in conjunction with CISIS 2010.

Media Sponsor

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HPCwire: The Leading Source for Global News and Information covering the entire ecosystem of High Performance Computing (HPC). More about HPCwire.

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